전남대학교 중앙도서관

An FPGA based digital radar receiver for soft radar

회의자료

issue: Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154) Signals, systems and computers Signals, Systems and Computers, 2000. Conference Record of the Thirty-Fourth Asilomar Conference on. 1:73-77 vol.1 2000
Author: Walke, R.L.
Dudley, J.
Sadler, D.
DB Label: Database : IEEE Xplore Digital Library

Architectures for adaptive weight calculation on ASIC and FPGA

회의자료

issue: Conference Record of the Thirty-Third Asilomar Conference on Signals, Systems, and Computers (Cat. No.CH37020) Signals, systems and computers Signals, Systems, and Computers, 1999. Conference Record of the Thirty-Third Asilomar Conference on. 2:1375-1380 vol.2 1999
Author: Walke, R.L.
Smith, R.W.M.
Lightbody, G.
DB Label: Database : IEEE Xplore Digital Library

Normalised Givens rotations for recursive least squares processing

회의자료

issue: VLSI Signal Processing, VIII VLSI signal processing VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]. :323-332 1995
Author: McWhirter, J.G.
Walke, R.L.
Kadlec, J.
DB Label: Database : IEEE Xplore Digital Library

Constant scale factor, on-line CORDIC algorithm in the circular coordinate system

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issue: VLSI Signal Processing, VIII VLSI signal processing VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]. :562-571 1995
Author: Hamill, R.
McCanny, J.V.
Walke, R.L.
DB Label: Database : IEEE Xplore Digital Library

A high performance IIR filter chip and its evaluation system

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issue: Proceedings of IEEE International Conference on Application Specific Array Processors (ASSAP'94) Application specific array processors Application Specific Array Processors, 1994. Proceedings. International Conference on. :22-32 1994
Author: Walke, R.L.
Evans, R.A.
Woods, R.F.
Floyd, G.
Wood, K.W.
DB Label: Database : IEEE Xplore Digital Library

A minimally redundant radix-4 systolic array for high performance IIR filtering

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issue: Proceedings of IEEE Workshop on VLSI Signal Processing VLSI signal processing VLSI Signal Processing, VI, 1993., [Workshop on]. :168-176 1993
Author: Walke, R.L.
Evans, R.A.
DB Label: Database : IEEE Xplore Digital Library

Online CORDIC algorithm and VLSI architecture for implementing QR-array processors

학술저널

issue: IEEE Transactions on Signal Processing IEEE Trans. Signal Process. Signal Processing, IEEE Transactions on. 48(2):592-598 Feb, 2000
Author: Hamill, R.
McCanny, J.V.
Walke, R.L.
DB Label: Database : IEEE Xplore Digital Library

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An extensible code generation framework for heterogeneous architectures based on IP-XACT.

회의자료

issue: 2011 VII Southern Conference on Programmable Logic (SPL); 2011, p81-86, 6p
Author: Perry, T.P.
Walke, R.L.
Benkrid, K.
DB Label: Database : Complementary Index

Design of an analogue subthreshold multiplier suitable for implementing an artificial neural network.

학술저널

issue: IEE Proceedings: Part G: Circuits Devices & Systems; Apr1992, Vol. 139 Issue 2, p261-264, 4p
Author: Walke, R.L.
Quigley, S.F.
Webb, P.W.
DB Label: Database : Complementary Index

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